mirror of
https://github.com/Obfuscator-Collections/VMProtect.git
synced 2024-12-27 08:49:27 +03:00
217 lines
5.0 KiB
C
217 lines
5.0 KiB
C
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/* -----------------------------------------------------------------------------
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* syn-intel.c
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*
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* Copyright (c) 2002, 2003, 2004 Vivek Mohan <vivek@sig9.com>
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* All rights reserved. See (LICENSE)
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* -----------------------------------------------------------------------------
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*/
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#include "types.h"
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#include "extern.h"
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#include "decode.h"
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#include "mnem.h"
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#include "itab.h"
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#include "syn.h"
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/* -----------------------------------------------------------------------------
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* opr_cast() - Prints an operand cast.
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* -----------------------------------------------------------------------------
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*/
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static void
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opr_cast(struct ud* u, struct ud_operand* op)
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{
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switch(op->size) {
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case 8: mkasm(u, "byte ptr " ); break;
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case 16: mkasm(u, "word ptr " ); break;
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case 32: mkasm(u, "dword ptr "); break;
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case 64: mkasm(u, "qword ptr "); break;
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case 80: mkasm(u, "tword ptr "); break;
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case 128: mkasm(u, "oword ptr "); break;
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default: break;
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}
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if (u->br_far)
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mkasm(u, "far ");
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else if (u->br_near)
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mkasm(u, "near ");
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}
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/* -----------------------------------------------------------------------------
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* gen_operand() - Generates assembly output for each operand.
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* -----------------------------------------------------------------------------
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*/
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static void gen_operand(struct ud* u, struct ud_operand* op, int syn_cast)
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{
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switch(op->type) {
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case UD_OP_REG:
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mkasm(u, ud_reg_tab[op->base - UD_R_AL]);
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break;
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case UD_OP_MEM: {
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int op_f = 0;
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if (syn_cast)
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opr_cast(u, op);
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#if 1 /* Changed [es:eax] -> es:[eax]. To revert, set #if 0 */
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if (u->pfx_seg && u->mnemonic != UD_Ilea)
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mkasm(u, "%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]);
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mkasm(u, "[");
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#else
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mkasm(u, "[");
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if (u->pfx_seg)
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mkasm(u, "%s:", ud_reg_tab[u->pfx_seg - UD_R_AL]);
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#endif
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if (op->base) {
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mkasm(u, "%s", ud_reg_tab[op->base - UD_R_AL]);
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op_f = 1;
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}
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if (op->index) {
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if (op_f)
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mkasm(u, "+");
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mkasm(u, "%s", ud_reg_tab[op->index - UD_R_AL]);
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op_f = 1;
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}
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if (op->scale)
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mkasm(u, "*%d", op->scale);
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if (op->offset == 8) {
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if (op->lval.sbyte < 0)
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mkasm(u, "-0x%x", -op->lval.sbyte);
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else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sbyte);
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}
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else if (op->offset == 16)
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mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.uword);
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else if (op->offset == 32) {
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if (u->adr_mode == 64) {
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if (op->lval.sdword < 0)
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mkasm(u, "-0x%x", -op->lval.sdword);
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else mkasm(u, "%s0x%x", (op_f) ? "+" : "", op->lval.sdword);
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}
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else mkasm(u, "%s0x%lx", (op_f) ? "+" : "", op->lval.udword);
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}
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else if (op->offset == 64)
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mkasm(u, "%s0x" FMT64 "x", (op_f) ? "+" : "", op->lval.uqword);
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mkasm(u, "]");
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break;
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}
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case UD_OP_IMM:
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if (syn_cast) opr_cast(u, op);
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switch (op->size) {
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case 8: mkasm(u, "0x%x", op->lval.ubyte); break;
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case 16: mkasm(u, "0x%x", op->lval.uword); break;
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case 32: mkasm(u, "0x%lx", op->lval.udword); break;
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case 64: mkasm(u, "0x" FMT64 "x", op->lval.uqword); break;
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default: break;
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}
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break;
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case UD_OP_JIMM:
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if (syn_cast) opr_cast(u, op);
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switch (op->size) {
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case 8:
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mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sbyte);
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break;
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case 16:
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mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sword);
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break;
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case 32:
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mkasm(u, "0x" FMT64 "x", u->pc + op->lval.sdword);
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break;
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default:break;
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}
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break;
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case UD_OP_PTR:
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switch (op->size) {
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case 32:
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mkasm(u, "word 0x%x:0x%x", op->lval.ptr.seg,
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op->lval.ptr.off & 0xFFFF);
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break;
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case 48:
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mkasm(u, "dword 0x%x:0x%lx", op->lval.ptr.seg,
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op->lval.ptr.off);
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break;
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}
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break;
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case UD_OP_CONST:
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if (syn_cast) opr_cast(u, op);
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mkasm(u, "%.2x", op->lval.udword);
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break;
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default: return;
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}
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}
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/* =============================================================================
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* translates to intel syntax
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* =============================================================================
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*/
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extern void ud_translate_intel(struct ud* u)
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{
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/* -- prefixes -- */
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/* check if P_OSO prefix is used */
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if (! P_OSO(u->itab_entry->prefix) && u->pfx_opr) {
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switch (u->dis_mode) {
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case 16:
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mkasm(u, "o32 ");
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break;
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case 32:
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case 64:
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mkasm(u, "o16 ");
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break;
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}
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}
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/* check if P_ASO prefix was used */
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if (! P_ASO(u->itab_entry->prefix) && u->pfx_adr) {
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switch (u->dis_mode) {
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case 16:
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mkasm(u, "a32 ");
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break;
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case 32:
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mkasm(u, "a16 ");
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break;
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case 64:
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mkasm(u, "a32 ");
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break;
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}
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}
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if (u->pfx_lock)
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mkasm(u, "lock ");
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if (u->pfx_rep)
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mkasm(u, "rep ");
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if (u->pfx_repne)
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mkasm(u, "repne ");
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if (u->implicit_addr && u->pfx_seg)
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mkasm(u, "%s ", ud_reg_tab[u->pfx_seg - UD_R_AL]);
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/* print the instruction mnemonic */
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mkasm(u, "%s ", ud_lookup_mnemonic(u->mnemonic));
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/* operand 1 */
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if (u->operand[0].type != UD_NONE) {
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gen_operand(u, &u->operand[0], u->c1);
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}
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/* operand 2 */
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if (u->operand[1].type != UD_NONE) {
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mkasm(u, ", ");
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gen_operand(u, &u->operand[1], u->c2);
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}
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/* operand 3 */
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if (u->operand[2].type != UD_NONE) {
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mkasm(u, ", ");
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gen_operand(u, &u->operand[2], u->c3);
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}
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}
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